For conventional semiconductor integrated circuits, a gate-first method has been used in which a gate insulating film and a gate electrode are formed first on a wafer surface, and then processing by etching is performed. In recent years, thinning of a gate insulating film in a MOSFET has been advanced with element downscaling. When a SiO2 film is used as the gate insulating film, a tunnel current is generated when a film thickness is 2 nm or less, which is a recent demanded value, and thus a gate leak current is increased. To address this, it has recently been considered to replace a gate insulating film material with a high-dielectric material having a relative dielectric constant higher than that of the SiO2 film. Such a method can reduce a SiO2 equivalent thickness (EOT: Equivalent Oxide Thickness) even if an actual insulating film thickness is increased. There is a demand to further reduce the EOT required for a MOSFET having a gate length of 22 nm or less. To satisfy the demand, the actual insulating film thickness needs to be increased by using a high-dielectric material, and thereby the gate leak current needs to be reduced. However, in the gate-first method, a source/drain formation step is performed after gate formation. Thus, the gate insulating film and the gate electrode are heated, and heating of the insulating film and metal film causes diffusion. This leads to a problem such as deterioration in Mobility and a shift in an operating voltage (Vt). In order to solve such problems, a gate-last method has been intensively studied and developed, in which source/drain formation is first performed and a gate insulating film and a gate electrode are formed at the end. In this method, since the gate section is formed at the end, it is considered that a heating temperature in the gate section can be lowered and that deterioration in Mobility and a shift in an operating voltage (Vt) can be suppressed, which are the problems in the gate-first method. What should be achieved by the gate-last method are to form various metal thin films on a shape having an opening of 15 nm or less and a depth of 30 nm or more (hereinafter referred to as a trench) and to control a material deposited on a sidewall or bottom of the trench to have a desired thickness. Moreover, since various metal thin films are laminated, interdiffusion between the metal thin films needs to be suppressed.
In the gate-last method, examples of the method for forming the various metal thin film materials include a CVD (Chemical Vapor Deposition) method, an atomic layer adsorption deposition method and a sputtering method. The CVD method has problems of film thickness controllability, in-plane uniformity and reproducibility since there is incubation time in a formation process. The atomic layer adsorption deposition method is excellent in film thickness controllability but has a cost problem since growth time is increased in the case of forming a thick film and an expensive raw material gas is used. In these methods using chemical reaction of raw material gases, a film can be evenly formed not only on the bottom of the trench but also on a sidewall thereof. On the other hand, an increase in deposition thickness narrows the trench opening. As one of the means for solving such problems, there has been proposed a method for forming various metal thin film materials by a sputtering method excellent in film thickness controllability, in-plane uniformity and reproducibility.
Patent Document 1, for example, discloses an apparatus capable of forming a film also on a sidewall of a trench by a sputtering method under a high pressure of 1 Torr or more, as similar to the CVD method. In this method, directionality of sputtering ions relative to a wafer surface is suppressed by sputtering under high pressure. Thus, film formation can be performed also on the sidewall of the trench. Patent Document 2 discloses a technique and an apparatus to form Ti and TiN laminated barrier underlayers using the sputtering method, then form a Seed-Al layer for facilitating migration of an Al film, and then embed Al through high-temperature migration. In this method, Al can be embedded in the trench while Al diffusion is suppressed with the Ti and TiN laminated barrier underlayers.
Patent Document 3 discloses an electronic component manufacturing method for embedding a low-melting-point-metal in a recess with excellent throwing power by forming barrier layers having sufficient barrier properties and wettability and by preventing or reducing aggregation of the low-melting-point metal deposited at high temperature. This method includes steps of: forming a first barrier layer made of TiNx on the workpiece by plasma treatment while applying a first bias power to an electrode in contact with a workpiece; forming a second barrier layer made of TiNx on the first barrier layer by plasma treatment while applying or without applying a second bias power to an electrode, the second bias power providing ion injection energy smaller than the first bias power; and embedding the low-melting-point metal on the second barrier layer.
Patent Document 4 discloses an electronic component manufacturing method for enabling embedding of Al without reducing an opening diameter even in a minute trench having an opening diameter of 22 nm or less. This method includes: a first step by sputtering while a magnetic field is formed on a target surface by a magnet unit having multiple magnets disposed at grid points of a polygonal grid, the magnets being disposed such that adjacent magnets have opposite poles, the first step forming a barrier layer containing titanium nitride on a workpiece having a recess formed therein, and a second step embedding a low-melting-point metal layer directly on the barrier layer under a temperature condition that allows the low-melting-point metal layer to flow.
As described above, in film formation into a recent minute pattern, the trench opening diameter is reduced by lamination of various metal thin films. To address this, a metal thin film formation technique is required, which can minimize reduction in the opening diameter even when various metal thin films are laminated. Also, in Al embedding, it has been known that Al diffusion deteriorates properties of a metal film used for a gate electrode section. Thus, an ultrathin film barrier layer formation technique is also required to suppress Al diffusion.